The present invention relates to a semiconductor device, and for example, relates to a technique applicable to a semiconductor device having two circuits of different power supply voltages.
One of semiconductor devices incorporates a control circuit for generating a control signal of a power control element. In such a semiconductor device, a voltage applied to the power control element, that is, the power supply voltage of power to be controlled is higher than the power supply voltage of the control circuit. Accordingly, in order to input the control signal to the power control element, a second control circuit may be provided between the control circuit and the power control element. In general, the power supply voltage of the second control circuit is equal to or lower than the power supply voltage of the power control element, and is higher than the power supply voltage of the control circuit. In such a semiconductor device, it is necessary to separate the circuit of a high power supply voltage from the circuit of a low power supply voltage.
For example, Japanese Unexamined Patent Publication No. Hei 11(1999)-330456 (Patent Document 1) describes a technique of a separation structure for separating two circuits. In Patent Document 1, a floating field plate formed of a polysilicon film surrounds an active region. Further, a metal electrode is provided so as to overlap with the polysilicon film. The metal electrode is coupled to the polysilicon film through a contact hole. A semi-insulating film is provided so as to cover the metal electrode.
Further, Japanese Unexamined Patent Publication No. 2010-80891 (Patent Document 2) and Japanese Unexamined Patent Publication No. Hei 4(1992)-332173 (Patent Document 3) describe the withstand voltage structure of a power MOSFET. In Patent Document 2, a field plate surrounds a drain region. Further, an interconnection line is provided so as to overlap with the field plate. The interconnection line is coupled to the field plate through a contact plug. In Patent Document 3, an insulating oxide film is provided between a high potential electrode and a base electrode. Further, a thin film resistive layer is provided over the insulating oxide film. The thin film resistive layer is spiral in plan view, and couples the high potential electrode and the base electrode.